Chip resistors are conventionally known (see e.g. Patent Document 1). The chip resistor disclosed in this document includes an insulating substrate, a resistor element, a protective film and a plating. The resistor element is formed on the upper surface of the insulating substrate. The protective film is formed on the upper surface of the insulating substrate. The protective film covers the resistor element. The plating is electrically connected to the resistor element. The plating has a portion formed on the upper surface of the insulating substrate and another portion formed on the lower surface of the insulating substrate. The portion of the plating formed on the upper surface of the insulating substrate is referred to below as the upper plating portion, and the portion of the plating formed on the lower surface of the insulating substrate is referred to below as the lower plating portion.
In mounting the conventional chip resistor, the lower plating portion is connected to an external conductor outside of the chip resistor. The external conductor is formed on the inner surface of a via hole provided in an insulating resin layer. Such a via hole is formed by applying a laser beam to the insulating resin layer.